Friday
9 Dec/22
16:00 - 17:00 (Europe/Zurich)

Hydra: an FPGA-based radiation-tolerant System-on-Chip (SoC)

Where:  

CERN

Zoom: https://cern.zoom.us/j/67569931479?pwd=N0NSRUQ4VUQxbjJVYlBIM0xQd2FjUT09 

(password 292597)

 

Hydra: an FPGA-based radiation-tolerant System-on-Chip (SoC)

Abstract:


 Electronics deployed close to accelerators and detectors are often subject to radiation. To avoid effects induced by this radiation, traditionally, the complexity of such electronics has been reduced to a minimum. In particular, running software in those locations is usually avoided.

Hydra is a SoC designed to run software in radiation, using the rad-tol System Board of the DI/OT platform [1]. Users can customise the operation of a system by changing the software it runs, without needing costly radiation testing campaigns because the hardware and gateware are pre-validated. This gives a degree of flexibility and convenience which fits the needs of many projects.

This talk will present how Hydra works, how it was hardened against radiation and how it integrates with the software development toolchain.

Finally, radiation tests of the Hydra reference design will be discussed and an outline of possible future evolution will be presented.

 

[1] https://ohwr.org/project/diot/wikis/home